Home Page


 Other Topics


A broad range of UYK based instructions are implemented via C subroutines and are matched to the user’s specific instruction set via an on-board FLASH based lookup table in order to allow transparent use of the Jentech Dual E board.  A standard set of Type E interface instructions are provided and the instruction set can be easily expanded to meet individual user needs.

Like the UYK family of military computers, the Dual E board supports multiple processing threads called “chains”.  These chains are basically a variable length list of instructions which are executed sequentially from beginning to end until all the instructions contained in the chain (or list) are done.  There are a total of 10 chains that can be running simultaneously on the Dual E board - five per interface, supporting NTDS input buffers, output buffers, EI buffers, EF buffers and user commands.  The actual length of any chain is determined by the complexity of the NTDS interface  and the programming of the user. 

Another feature of the UYK computer incorporated into the Jentech Dual E board is a real-time, multi-tasking operating system which supports the execution of these instruction chains.  The Dual E board is capable of automatically sequencing through all instructions contained in all 10 chains simultaneously without input from the user.  All chain housekeeping and context switching is performed automatically by the multi-tasking operating system, including the monitoring of buffer status, operations performed on data in memory and the transfer of data across VME and NTDS.  Status register feedback and interrupt signaling much like that performed in the UYK computer can be enabled to alert the user about buffer completion and error conditions.  The Jentech real-time multi-tasking operating system is supported by high performance hardware resources which attain throughput and latency results that exceed other products in today's NTDS market.

The FLASH based lookup table eliminates the need for the user to rewrite any existing instruction chains or interface drivers by correlating each specific user instruction set with one or more of the generic subroutines provided by the Dual E board.  Once the user has defined all op-codes and instruction formats contained in the user software, Jentech will build the FLASH based lookup table which will stay resident on the board and be automatically invoked each time upon startup.  This only needs to be done once prior to the first time the board is used.  Modifications and the addition of new instructions are easily incorporated.

The following is a list of instruction types supported:

•

Initialize VME Interface using associated parameters

•

Initialize NTDS Interface using associated parameters

•

Initiate Buffer (input, output, EI, EF)

•

Initiate EF Buffer with force

•

Initiate Immediate EF (with or without force)

•

Initiate Continuous EI (multiple forced EFs without loss)

•

Terminate Buffer (input, output, EI, EF)

•

Set Chain Active and spawn a new processing thread (input, output, EI, EF)

•

Boolean Operations to memory or Accumulators (AND, NAND, OR, XOR)

•

Arithmetic Operations to memory or Accumulators (Add, Subtract, Increment)

•

Bit Operations to memory or Accumulators (Set, Clear, Test, Test & Set, Shift)

•

Load/Store (to Accumulators, memory, RTC, BCW, Index Registers)

•

Jump/Skip (if GT, LT, EQ, NEQ, buffer active, indexed)

•

Delay Instruction Execution

•

Monitor Interrupts (input, output, EI, EF)

•

Enable/disable user instruction trace file

The following are the VME interface parameters which are initialized upon power up:

• 

Board Base Address (hardware switch)

• 

RAM size (hardware switch)

• 

Slave address modifiers (hardware switch)

• 

Master address modifiers (either hardware switch or software instruction)

• 

Bus Request Level (either hardware switch or software instruction)

• 

Bus Request Type (either hardware switch or software instruction)

• 

Interrupt Levels (software instruction)

• 

Bus Timeout (software instruction)

• 

VME64 .v. Standard Mode (software instruction)

• 

VME64 Block size (software instruction)

The following are the NTDS I/F parameters which are initialized upon power up:

• 

Buffer .v. Word timeout mode (software instruction)

• 

Input timeout interval (software instruction)

• 

Output timeout interval (software instruction)

• 

Enable/disable SIF features (software instruction)

• 

Parity enable/disable (software instruction)

• 

Burst mode enable/disable (software instruction)

• 

Half Duplex operation (dependent on firmware version downloaded from FLASH)

            Home Page                                       Other Topics